Bindu Agarwalla

Nesting of Interrupts

Vectored Interrupt Technique

Enabling And Disabling Interrupts

Sequence of Events Interrupt

Valid Bit Cache Coherence Problem

Numericals on Hit Rate Miss Penalty Part: 2

Numerical on HIT Rate Miss Penalty

DMA Operation Burst Mode Cycle Stealing

DMA Intro & Registers Used

Non Restoring Division Algorithm Example

Restoring Division Example

Restoring Division Algo

Data Manipulation Instructions: Logical & Bit Manipulation Instructions

Data Manipulation Instructions : Shift Instructions

Paging Part 1

IEEE Introduction Part-I

IO Mapped And Memory Mapped IO

Instruction Set : Program Control Instructions

Paging with TLB and Sharing

Paging with TLB

Numericals On VM

Register Indirect and Memory Indirect Addressing mode

Contiguous Allocation Part 2

Interrupt Driven IO

Booth's Algorithm Example

Hashed Page Table and Inverted Page table

Numericals On Memory Interleaving PART-1

Denormalized Number and Special Numbers in IEEE

Direct Mode Control Sequence

Index Mode Control Sequence

Index Addressing Mode

Numerical on set associative and associative cache