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73 видео
Lecture-9a: Formal verification using Coq-Polymorphic types, list, implicit arguments
EEE342-MP-10a: String manipulation and processor control instructions
EEE342-MP-3b: The Programming Model, FLAGS, Real and Protected Modes
Lecture-5a: Formal specification using Coq-list, types natprod and natlist, theorems over natprod
Lecture-8a: Formal verification using Coq- Defining listnat equality, list equivalence
Lecture-4b: induction tactic, theorem over mult, plus, bool
EEE342-MP-4b: Protected Mode of Memory Addressing in Intel Microprocessors
EEE342-MP-6b: Instructions set, data transfer instructions PUSH, POP, IN and OUT
EEE342-MP-7b: Instructions set, instructions INC, DEC, MUL, DIV and CMP
EEE342-MP-11b: Software and hardware Interrupts
EEE241-DLD-16a: Boolean functions simplification-five-variable K-maps
EEE241-DLD-13-2: Binary Counters
EEE342-MP-6a: Instructions set, data transfer instructions MOV and XCHG
Lecture-8b: Formal verification using Coq-theorems using function listnat equality, list equivalence
EEE342-MP-8a: Instructions set, instructions AND, OR and XOR
EEE342-MP-4a: Real and Protected Modes of Addressing in Intel Microprocessors
EEE342-MP-13a: Buffering and de-multiplexing 8086 and 8088 microprocessors
EEE342-MP-8b: Instructions set, instructions TEST, rotate and shift
Lecture-3a: coqc, import, induction on nat and double function
Lecture-7a: Formal verification using Coq-list, natlist, lemmas on app and alternate
EEE342-MP-9a: String instructions MOVS, CMPS and prefix REP
Lecture-6b: Verification using Coq-list, natlist, bags, add, remove, member
EEE342-MP-14b:Input Ouput interfacing with 8088 and 8086 microprocessors
Lecture-4a-formal verification using Coq-induction tactic, theorem over mult, leqb
EEE342-MP-3a:The Programming Model of Intel Microprocessor
EEE241-DLD-3-a Boolean functions
EEE342-MP-1b: Introduction to Microprocessor based and number systems
EEE342-MP-7a: Instructions set, instructions ADD, ADC, SUB and SBB
EEE241-DLD-4-b: Boolean function simplification-two var maps
EEE241-DLD-1-b: Digital Logic Design - Binary codes
