Tae-Hwan Kim

[ASP-DAC'14] A High-Speed and Low-Complexity Lens Distortion Correction Processor

Digital Systems Design 2017 Fall (Korea Aerospace University) - Term Project

Mask Wearing Detection Based on Binary CNN Inference Accelerator in an FPGA

TORRES: A Resource-Efficient Inference Processor for Binary Convolutional Neural Networks in an FPGA

TORRES: A Resource-Efficient Inference Processor for Binary Convolutional Neural Networks in an FPGA

bird

dog

A Real-Time Keyword Spotting System Based on End-To-End Binary Convolutional Neural Networks in FPGA

A Lightweight Radar Image Classification System Based on a Binary Neural Network Inference Engine

A Soft Error-Resilient Binary NeuralNetwork Inference Processor

cat no sound

Mask Wearing Detection Based on Binary CNN Inference Accelerator in an FPGA

Demonstration of a Reconfigurable Inference Processor for Recurrent Neural Networks in an FPGA

CIFAR10 Classification Based on Binary CNN Inference Accelerator in an FPGA

A 17.01 MOP/s/LUT BNN Proc. Showing 87.81% CIFAR10 Acc. with 2.6M-bit On-Chip Param. in a 28nm FPGA

A 34.02MOP/s/LUT BNN Inf. Processor Showing 87.81% CIFAR10 Accuracy with 2.6Mbit On-Chip Params.

A Resource-Efficient Inference Accelerator for Binary Convolutional Neural Networks

Keyword Spotting Based on Binary CNN Inference Accelerator in an FPGA

Binarized Convolutional Neural Network Acceleration Processor for Reinforcement Learning

Binarized Neural Network on ARM Cortex A9

demo2

Integrated Hardware-Software System for Accelerating Transformer Inference

BiNPU demo video

Real-Time CIFAR-10 Classification Under a Low-Cost FPGA System.

이진 가중치 회귀 신경망의 추론을 위한 저 복잡도 프로세서의 설계 및 구현