FPGA-based SmartNIC for high-performance TCP/IP application

Опубликовано: 19 Июнь 2026
на канале: DGIPcore
763
4

This video will give you more detail of DG's TOE100G-IP Core and Silicom's PacketMover framework and the application of the FPGA-based SmartNIC designed for high performance TCP/IP applications.

This video is second part of the first video.
TOE100G-IP with Silicom's PacketMover Performance Demo on fb2CG@KU15P Kintex UltraScale+ FPGA Card
   • Silicom's PacketMover Performance Demo on ...  

This is the result of a collaboration between Design Gateway and Silicom Denmark which we proudly present to you.

For more information about TOE100G-IP, please visit
🔗 DG Website: https: https://dgway.com/TOE-IP_X_E.html
🔗 AMD Partner Solutions: https://www.amd.com/en/search/partner...

For more information about PacketMover and FPGA Card, please visit Silicom website.
https://www.silicom-usa.com/pr/server...
https://www.silicom.dk/product-detail...

------------------------------
Chapters:
0:00 Introduction
0:27 TOE100G-IP
1:28 Silicom FPGA Card for 100GE
3:04 DG TOE100G-IP + Silicom PacketMover
5:07 Application

------------------------------

Contact channels:
Website: http://design-gateway.com/
Youtube:    / dgwayweb  
LinkedIn:   / designgateway  
Facebook:   / accelerated-computing-by-dg-107294971904731  
Twitter:   / design_gateway  
Blog: https://dgway.com/blog_E/