Toward Holistic Soft-Error-Resilient Shared-Memory Multicores
Guest editor Srini Devadas and author Omer Khan expand on how a proposed lightweight, soft-error-resilient architecture for shared-memory multicores enables cores to autonomously perform redundant execution of uninterrupted instruction sequences. From Computer's October 2013 issue: http://www.computer.org/csdl/mags/co/.... Visit Computer: http://www.computer.org/computer.