T20Q144 FPGA Development Board – Complete Design & Demo Part5
This video demonstrates ROM-based pattern generation using an FPGA, implemented on an Efinix Trion FPGA development board.
It is part of an ongoing tutorial series aimed at helping students and engineers understand practical FPGA design workflows.
In this part, we focus on:
Using a single-port ROM in Verilog
Initializing ROM contents using a HEX file
Generating ROM addresses using a counter
Reading predefined data patterns from ROM
Displaying ROM output on LEDs as visible binary patterns
Understanding registered ROM outputs and timing behavior
The example shows how memory blocks can be used inside an FPGA for lookup-table based logic, pattern generation, and control applications.
Topics Covered
Verilog implementation of a single-port ROM
ROM initialization using readmemh
Counter-based address sequencing
Hardware verification using LED outputs
Who This Video Is For
B.Tech / M.Tech ECE students
FPGA beginners and self-learners
Faculty members conducting digital or FPGA labs
Engineers working with Efinix Trion FPGAs
Note
For detailed explanations of pin assignment, synthesis, and platform flash programming using the CH341A programmer, please refer to the previous videos in this tutorial series, where these steps are covered in detail.
This FPGA development board is designed for educational and prototyping purposes.
For availability and purchase inquiries:
[email protected]