GATE 2018 CS Q23. A 32-bit wide main memory unit with a capacity of 1 GB built using DRAM chips
GATE 2018 CS Question Paper Complete Solution
Q 23. A 32-bit wide main memory unit with a capacity of 1 GB is built using 256M × 4-bit DRAM chips. The number of rows of memory cells in the DRAM chip is 214. The time taken to
perform one refresh operation is 50 nanoseconds. The refresh period is 2 milliseconds. The percentage (rounded to the closest integer) of the time available for performing the memory
read/write operations in the main memory unit is __________.
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