Hey! 'Check out the Parity Generator'
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lets learn the Parity generator.
A Parity Generator is a Combinational Logic Circuit that Generates the Parity bit in the Transmitter. • A Parity bit is used for the Purpose of Detecting Errors during Transmissions of binary Information. • It is an Extra bit Included with a binary Message to Make the Number of 1's either Odd or Even.
The sum of the data bits and parity bits can be even or odd . In even parity, the added parity bit will make the total number of 1s an even amount whereas in odd parity the added parity bit will make the total number of 1s odd amount.
The basic principle involved in the implementation of parity circuits is that sum of odd number of 1s is always 1 and sum of even number of 1s is always zero. Such error detecting and correction can be implemented by using Ex-OR gates