Using Quartus Prime IP Generator & CORDIC Algorithm: Sine & Cosine Calculations in FPGA #3
In this tutorial, we explore the powerful IP generator feature in Quartus Prime to configure the CORDIC algorithm for calculating sine and cosine functions. CORDIC (Coordinate Rotation Digital Computer) uses efficient shift-add operations, making it ideal for hardware implementations that avoid costly functional units.
Learn how to specify synthesis options and see their impact on the Quality of Results (QoR), while also understanding the role of placement using Quartus’s Chip Planner. We also cover essential pre-lab preparation, including reviewing soft IPs and Intel’s CORDIC IP core guide.
Don't forget to watch the tool demonstrations using the DE1-SoC board and Questa simulator for hands-on practice.