Gate Questions on OpAmp Circuits | 2015-2020 | GATE PYQ | GateBusters ECE | NerdyBug
Hey, Fellow Nerds!
In this video, we focus on gate problems on opamp, covering important opamp circuit analysis techniques through gate problems solved from previous years. As part of your gate 2026 preparation, working through these opamp circuits problems for gate will help strengthen your understanding of gate analog circuits and improve problem-solving speed. Whether you're tackling Analog Circuits for GATE ECE or Analog Circuits for GATE EEE, practicing gate op amp questions is essential for mastering the subject. This session is designed to help with gate ece topicwise pyq, ensuring you're well-prepared for the gate exam with step-by-step solutions to opamp problems for gate.
Watch now to master these critical concepts for GATE 2025 or GATE 2026 preparation! Don’t forget to like, share, and subscribe for more valuable content.
🔥Full series: • Analog Circuits 1 | NerdyBug
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📅 Chapters:
00:00:00 Introduction
00:00:16 Problem 01 [GATE 2020] : The components in the circuit shown below are ideal. If the opamp is in positive feedback and the input voltage vi is a sine wave of amplitude 1 V, the output voltage is
00:01:25 Problem 02 [GATE 2018] : An opamp based circuit is implemented as shown below. In the circuit, assume the opamp is ideal. The voltage [in volts, correct to one decimal place] at node A, connected to the negative input of the opamp as indicated in the figure is
00:04:44 Problem 03 [GATE 2018] : In the circuit shown below, the opamp is ideal and zener voltage of the diode is 2.5 volts, At the input unit step voltage is applied, i.e, Vin(t) = u(t) volts. Also, at t=0, the across each of the capacitors is zero. The time t, in milliseconds, at which the output voltage Vout crosses -10 V is
00:10:39 Problem 04 [GATE 2017] : In the voltage reference circuit shown in the figure, the opamp is ideal and the transistors Q, Q2,..Q32 are ideatical in all respects and have infinitely large values of common-emitter current gain. The collector current current Ic=Isexp[Vbe/Vt), where Is is the saturation current. Assume that the voltage Vp shown in the figure is 0.7 and the thermal voltage Vt=26 mV. The output voltage Vout [in volts] is
00:17:15 Problem 05 [GATE 2017] : The amplifier shown in the figure is implemented using a compensated operational amplifier [opamp], and has an open-loop voltage gain, Ao=10^5 V/V and an open-loop cut off frequency fc=8 Hz. The voltage gain of the amplifier at 15 kHz, in V/V is
00:20:52 Problem 06 [GATE 2017] : For the operational circuit shown, the output saturation voltages are +-15 V. The upper and lower threshold voltages for the circuit are
00:22:37 Problem 07 [GATE 2016] : For the circuit given in the figure, R1=R2=R3=1 ohm, L=1 muH, and C= 1 muF. If the input Vin=cos[10^6 t] then the overall voltage gain [Vout/Vin] of the circuit is
00:26:06 Problem 08 [GATE 2016] : An opamp has has a finite open loop voltage gain of 100. Its input offset voltage Vios [+5 mV] is modeled as shown in the circuit below. The amplifier is ideal in all other respects. Vinput is 25 mV. The output voltage [in milli volts] is
00:27:48 Problem 09 [GATE 2016] : In the opamp circuit shown, the zener diodes Z1 and Z2 clamp the output voltage Vo to +5 V or -5 V. The switch S is initially closed and is opened at time t=0. The time t=t1 (in seconds) at which Vo changes state is
00:35:06 Problem 10 [GATE 2015] : A p=i-n photodiode of responsivity 0.8 A/W is connected to the inverting input of an ideal opamp as shown in the figure, +Vcc=+15 V, -15 V load resistor RL=10 kohm. If 10 muW of power is incident on the photodiode, then the value of the photocurrent [in mu A] through the load is
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