DD7A Introduction to Hardware Description Language (Verilog and VHDL)
Introduction to Hardware Description Language (HDL) as well as two most common languages used for HDL (Verilog and VHDL).
At the end of this video, Aldec's Active-HDL development environment is used to enter Verilog design code for simulation. You can get the professional version or the free Student Edition of Active-HDL from www.aldec.com.
The next video in this series "DD7B Active-HDL Verilog" demonstrate a Verilog design from problem definition to simulation. You can access the video at the link • DD7B Active HDL Verilog Tutorial .