This is a video demonstrating our hardware implementation of the classic Pokémon battle system. This was a group project for the class Digital Logic Design. We used a Field Programmable Gate Array (FPGA), which is essentially a chip with a bunch of connectable logic gates, with an output to a VGA monitor and inputs of a few buttons on the development platform (and switches for debugging)
Created by:
Patrick W. Crawford
Zhanna Kaufman
Becca Thompson
[samples of verilog code, a hardware description language]
http://ece353.ecs.umass.edu/verilog/v...
Related blog post: http://theduckcow.com/2016/pokemon-fp...