What's Inside a Foundry PDK? | DRC, LVS and ESD Protection Explained
Ever wondered what actually lives inside a foundry PDK — and why it makes or breaks your silicon? In this lecture, we break down every major component of a Process Design Kit: from DRC/LVS runsets and parametrised cells, to compact device models, ESD protection, electromigration checks, and device corners.
Whether you're taping out for the first time or deepening your understanding of the design-to-silicon flow, this video gives you the foundry engineer's perspective on what the PDK contains and why each piece matters.
⏱️ CHAPTERS
00:00 Introduction
01:30 What is a PDK?
03:00 Product Design Flow Overview
05:00 What Does a PDK Contain?
07:00 How a PDK is Built
10:00 Design Manual Walkthrough
13:00 Parametrised Cells (pCells)
15:30 Design Rule Check (DRC)
18:00 Layout vs. Schematic (LVS)
21:00 ESD and Latch-Up
25:00 Antenna Effect
28:00 Electromigration and IR Drop
31:00 Self Heating Effect
33:00 High Voltage / Multi-Voltage Domain Checks
35:00 Device Models and Corners
39:00 Advanced PDK Features (RF, EM, 3D Packaging)
🔗 RELATED LECTURES
► Arc A – MOSFET Device Physics
► Arc B – Reliability (NBTI, HCI)
► Arc G – Computer Architecture
📌 This lecture is part of a structured semiconductor engineering series targeting IC design professionals and graduate students. New lectures posted regularly.
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