Lab_6_Part_2 (FPGA FIFO IP and verification via remote server, ILA/VIO)
Topic: FPGA FIFO IP and verification via a remote server, ILA/VIO
Lab Instructor: Puneet Kumar, MTech ECE, IIIT Delhi
Course: ECE270: Embedded Logic Design, ECE, IIIT Delhi (Faculty: Dr. Sumit Darak)
Complete Playlist: • Lab_1_Part_1 : Introduction to Vivad...