W7_L4: Implementing multiplexers using decoders & tri-state logic
Welcome to Week 7 Lecture 4 of the course "Digital System" by Prof. Janakiraman Viraraghavan
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Video Overview
This lecture explores the role of multiplexers in hierarchical digital design by examining how decoders can be repurposed to implement multiplexers efficiently. Starting with a basic understanding of how a multiplexer selects one input from many, we dive into the use of enable signals and tri-state logic to simplify wiring and reduce gate usage. The session covers implementation strategies using standard cells and explains how decoder-based MUX designs can scale in complexity and performance, laying a foundation for more advanced circuit design techniques.
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