Creating Macros from a VHDL code (Hardware Description Languages in TINA part 1)
Hardware Description Languages (HDL) are powerful tools to describe and simulate complex electronic devices.
In this tutorial video we will show how you can create a macro from a VHDL code and use in TINA.
First we will create the macro, then we will test our newly created macro in TINA’s Schematic Editor with digital circuit simulation. To do this, we will place two High-Low digital switches from the Switches toolbar, one for each of the A, B inputs, and two logic indicators.
By pressing the DIG Interactive button the logic levels of the nodes appears, Red for High. Blue for Low.
We will change the input states by clicking the switches.
The logic indicators will also show the logic level of the outputs in a
Red square for High, and empty square for Low. The Half adder circuit works as required.
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