This tutorial walks you through the initial steps in designing an SRAM and then focuses on the first circuit that we must design the memory cell. An overview of the architecture will be presented in a block diagram that will describe the functions of the major blocks required to create an SRAM. A large portion of this video will be dedicated to the design and layout of the memory cell (also called the bit cell) and how it is arrayed. It starts with a description of how the memory cell works then analyzes how the cell is read and written; with specific attention paid to read disturb which can cause the cell to inadvertently flip when it is read. Waveforms from SPICE simulations of the memory cell will be presented along with a SPICE input file that can be used to create your own simulations. A SPICE netlist from the layout of the memory cell will also be supplied so that the actual parasitic capacitance can be included in the simulations.