AES implementation using NCL S box, hardware implementation
This project demonstrates hardware implementation of AES using asynchronous NCL S-Box. In today's world there is a growing demand for real time implementation of cryptographic algorithms which are being used in secure communication systems, networks and security systems. Increased use of computer and communications systems by industry has increased the risk of theft of proprietary information. Cryptographic services required for these applications involve not only solutions for data protection but also self- implementation concerns. Key management in whatever form is one of the important hard parts. AES has high security strength, when compared to DES. By means of using Null Convention Logic for AES S-Box implementation, then it will be difficult for an attacker to decipher secret keys embedded within the cryptographic circuit of FPGA board. When AES is implemented using NCL S-Box it occupies less area, low power usage hence resistant to power attack and operates faster than other cryptographic algorithms. Hardware AES implementation has higher reliability than software since its difficult to be read or modified by attackers and less prone to reverse engineering. By J.MERCELIN LINCY, VMP336, M.E. EMBEDDED SYSTEM TECHNOLOGIES, VELTECH MULTITECH DR.RR DR.SR ENGG COLLEGE.