Mirabilis Design provides chiplet and UCIe system-level IP, modeling templates and architecture-trade-off platforms. The system-level IP contains timing, all the settings as parameters, power, thermal and protocol functionality. The modeling templates contains various AI, parallel processors, GPU, memory, analog and IO chiplet models that can be used to test, analyze, optimize and validate the system. Mirabilis Design has over 80 customers in semiconductors, embedded systems and software. The company is based in Santa Clara, CA, USA and has development and support centers in India, Germany, South Korea, China and Japan.
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