Xilinx IP cores for DSP: Direct Digital Synthesizer (DDS)
RTL Simulation of Xilinx DDS IP core with implementation of simple waveforms and some modulation schemes. Here can be found Math Modelling in Python of some important DSP algorithms and their implementation by using Xilinx IPs with RTL Simulation. All sources are available in my github:
https://github.com/farbius/dsp_xilinx_ip