Poster Presentation: SoCET: Automated Digital Verification (ADV)

Опубликовано: 11 Август 2026
на канале: John Martinuk
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Title: SoCET: Automated Digital Verification (ADV)

Authors:
John Martinuk, College of Engineering
Zihan Liu, College of Engineering
Zhengsen Fu, College of Engineering
Yuxin Zhang, College of Engineering
Haoming Duan, College of Engineering

Abstract:
The focus of this project is to build an automated, physical testbed combining FPGA emulation, UVM, and FV to rigorously verify the functionality of a digital design before it is sent out for fabrication. Field-Programmable Gate Arrays (FPGAs) are devices used to emulate a digital design in the real, physical world; however, verification teams typically simulate, in software, more testcases than they emulate with an FPGA. These software simulations can take a very long time when using a pseudo-random testcase generator like Mentor Graphics’ Universal Verification Methodology (UVM) which is a great tool for finding the corner cases when the time to simulate all possible inputs becomes impractical. It takes software longer to simulate a testcase than for hardware to emulate the testcase; software must run multiple instructions to calculate each gate’s output while the hardware emulation simply lets the current flow through its physical gates. If the UVM sequences drive the inputs of a physical FPGA, then it would require less run time, which means more testcases can be evaluated before a tapeout deadline. To further improve the verification rigor, the predictor & scoreboard UVM components can be supplemented with assertions made using Formal Verification (FV), a tool which uses mathematical induction to prove defined, undesired outputs will never occur under normal operation (ex: no bit-flipping from solar radiation). With these tools combined, a greater number of testcases can be evaluated on the physical implementation of a digital design to be submitted for an expensive fabrication run and the outputs of these testcases will be scrutinized to a high degree with the use of two separate models of expected behavior.

Mentor(s):
John Martinuk,
Mark Johnson