USI: Universal Serial Interface in ATtiny
📥 RESOURCES & DOWNLOADS
• ATtiny25/45/85 Datasheet: https://ww1.microchip.com/downloads/e...
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Have you ever wondered how tiny microcontrollers with limited pins manage to support multiple communication protocols? In this section, we explore the Universal Serial Interface (USI) found in ATtiny microcontrollers - a clever hardware design that combines the common elements of UART, I2C, and SPI into a single flexible module. You will also discover how protocols can be "misused" to mimic other protocols they weren't designed for.
We begin with a fascinating example: using UART to implement the 1-Wire protocol. Since ATmega328P lacks native 1-Wire support, the UART TX/RX interface can be configured to generate compatible timing. At 150kBd with 8 data bits, each bit takes 6.67us, allowing a complete 9-bit UART frame (start bit + 8 data bits) to fit within the 60us 1-Wire bit window. The reset pulse requires switching to 10kBd (100us per bit) to achieve the required 480us duration.
The hardware considerations for UART-to-1-Wire conversion are explored: a diode must be placed between TX and the bus to prevent short circuits when the slave pulls the line LOW while TX drives HIGH. A pull-up resistor maintains the idle HIGH state since current cannot flow through the diode from TX to charge the wire.
The ATtiny family is introduced as ATmega328P's smaller sibling - same CPU architecture but fewer pins (8 vs 28) and reduced peripherals. The ATtiny85 offers 8KB program memory and 512 bytes of RAM in a compact package. Critically, ATtiny shares communication pins between protocols - SPI, I2C, and UART cannot operate simultaneously.
Rather than wasting silicon on three idle modules when only one communicates, Atmel created USI - extracting the common denominator of serial protocols. Key observations: all protocols idle HIGH, most have clock signals, data starts with a LOW transition, and all shift data serially bit-by-bit.
The USI block diagram is analyzed in detail: USIDR (8-bit data shift register) with MSB connected to output and LSB receiving input, configurable DO/DI pin routing (separate for SPI/UART, shared for I2C), multiple clock sources (USCK pin direct or inverted, Timer0 compare match, software USICLK bit), a 4-bit counter for tracking byte completion (16 edges = 8 bits), and a Two-Wire Control Unit for I2C start condition detection in slave mode.
Protocol-specific implementations show what USI provides and what software must handle: for SPI, simply load USIDR and clock - USI handles the shifting; for I2C, software must manually create start/stop conditions by toggling pins in the correct sequence; for UART, Timer0 generates the clock at the desired baud rate, and software handles parity.
Creative USI applications beyond communication include: using the 4-bit counter as a standalone timer, extending Timer0 to 12 bits by connecting Timer0 overflow to USI counter, implementing edge detection with an interrupt on overflow, and generating software interrupts by writing to USICLK.
#Arduino #ATtiny #USI #UniversalSerialInterface #UART #SPI #I2C #1Wire #BitBanging #SerialCommunication #EmbeddedSystems #Microcontroller #ProtocolConversion #ATtiny85
📖 CHAPTERS
0:00 Introduction
0:49 Similarities of 1-Wire and UART
12:41 Connecting 1-Wire Devices to UART pins
16:14 Introducing the ATtiny
21:00 Similarities in the Protocols
23:01 The Universal Serial Interface (USI)
29:42 Using USI for SPI
30:46 Using USI for I2C/TWI
32:56 Using USI for Big-Banging
34:06 Using USI to extend the Timer
36:40 Summary and What's next?