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PR NO. 10
PR. NO. 9
Making Quads in K map simplification
K map Technique for reduction of boolean equations
PR no. 8
Chapter 3. Combinational and logic circuits
chapter 3.combinational and logical circuit
Logic Families
Pr. No. 7
IMPLEMENTATION OF BOOLEAN EQUATIONS USING NAND AND NOR
Demorgans Theorem
PR. NO. 6
Examples using Boolean Algebra
NOR as a Universal Gate
PR. NO 5: Half adder and Half Subtractor
NAND as a Universal Gate
Chapter 2: Logic Gates
10's complement subtraction, Gray code, Excess 3 code.
Lecture no 10. BCD subtraction using 9's complement
Practical no. 4 Half adder
Lecture no. 9 :BCD addition
Lecture no. 8: Binary arithmetic
Lecture no. 7: Binary Arithmetic