VLSI Design Flow || Unit 1: Ch.2

Herzberg Motivational Theory

Non Ideal IV effect VLSI Unit 3 ch. 3

Performance Management || Introduction to performance Management||History of Performance Management

9 box Grid / Matrix

IV Characteristics of NMOS and PMOS VLSI Unit 3 Ch. 2 important question

Introduction to CMOS Unit. 3 ch. 1

Data Register in VLSI || JTAG || TAP and TAP Controller Unit. 2 Ch. 4

TAP and TAP Controller in VLSI Ch. 3 (a) .

JTAG in VLSI || Unit 2 || Ch. 3

Need of Design of Testability || Controllablility || Observability In VLSI Unit 2. Ch. 2

Faults || Stuck-at fault || Stuck-open || Stuck-short fault || Unit-2 Ch. 1.

FPGA in VLSI ch. 7

CPLD in VLSI Ch. 6

Test Benches in VHDL || VLSI Unit 1. Ch. 5

Function & Procedure in VHDL || VLSI || Unit 1 Ch.4

Modeling Style in VHDL || VLSI Unit1 ch. 3

VLSI Design Flow || Unit 1: Ch.2

VLSI || Moore's Law || Unit 1: Ch 1

Introduction to VLSI Design

Hit Or Miss Transform in Digital Image Processing

Opening and Closing in Digital Image Processing

Dilation And Erosion In Digital Image Processing

Image Compression Model in Digital Image Processing.

Semantic Image segmentation