Become a Patron: / adrienkohlbecker
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In this video, I troubleshoot some signal integrity problem I'm having with the build. It looks like the busses are susceptible to random noise and bit flips. To figure it out, I add a bus monitor using a Teensy. I then add a new power distribution circuit, and make some modifications to the clock for quality of life during debugging. In the end, the problem persists, but with a much less probable occurrence. Let me know if you have other ideas to fix it better!
Join me in discussing this project in the 6502 forums: http://forum.6502.org/viewtopic.php?f...
View the source code and schematics shown in this video: https://github.com/adrienkohlbecker/B...
The most recent source code and schematics are available here: https://github.com/adrienkohlbecker/B...
Chapters:
00:00 Intro
00:22 Replacing chips with correct families
04:00 Troubleshooting signal integrity problem
06:04 Adding Teensy monitor
17:43 KiCad updates
24:49 Power harness
27:27 Clock modifications
29:09 Bit flip on the data bus
30:03 Clock power on reset
32:48 Outro