Implementation of the Control Unit

The Memory Hierarchy

Performance Improvements with Pipelines

Out-of-Order Execution

Multiple-Issue

Data Hazards 2

Control Hazards 3

Control Hazards 2

Control Hazards 1

Data Hazards 1

Pipelining the LC3, v2

Pipelining the LC3, v1

Introduction to Pipelining

The Completed LC-3

TRAP, Interrupt, and Exception Control

Implementation of the Address Control Logic

Implementation of the Control Unit

Hardwired vs Microprogrammed FSMs

A closer look at the control unit

Design Trade-offs

Loop Control

Lab 1: Directions

Lab1: Intro to Logisim

Course Administration

Intro to a Modern Classroom