All Flip Flops in Verilog with Testbench: JK FF, SR FF, D FF, T FF
For source files: https://github.com/erdemtuna/verilog-...
This video develops and provides verilog codes for JK flip flop, SR flip flop, D flip flop and T flip flop. Things that are done in more detail:
Opening a new project in Quartus.
Writing modules for flip flops.
Writing a testbench for JK flip flop.
Simulating testbench in Modelsim.