Episode 5.9 - Elimination of False Cache Line Sharing
Table of Contents:
00:17 - False Cache Line Sharing explained
01:09 - Histogram calculation example
01:58 - New data layout
02:40 - Up to 4 cores can share the same cache line
03:25 - Padding to avoid false sharing
03:46 - Performance results
04:29 - Hardware prefetching introduces false cache line sharing in Xeon CPU