Inverter Layout || DRC, LVS || Parasitic Extraction || 17ECL77

Wireless network using Wireless Router with WEP security on Packet Tracer

VLAN on single Switch LAN using Cisco Packet Tracer

Dynamic Routing using Cisco Packet Tracer

Static Routing using Cisco Packet Tracer

Configure a given network using DHCP and observe the IP allocation using Cisco Packet Tracer

Configure a given network and Observe ARP entry at PC and Router using Cisco Packet Tracer

Data Exchange Using XCH Instruction || 8051 || Microcontroller Lab || 18ECL47 || VTU

Data Exchange Program ||8051 || Microcontroller Lab || 18ECL47 || VTU

Data Transfer with Overlapping ||8051 || Microcontroller Lab || 18ECL47 || VTU

Data Transfer without Overlapping ||8051 || Microcontroller Lab || 18ECL47 || VTU

AddressingModes || Assembly_Program || Keil Software || Microcontroller Lab || 18ECL47 || VTU

Simulation || Assembly_Program || Keil Software || Microcontroller Lab || 18ECL47 || VTU

Introduction || Programming || Microcontroller Lab || 18ECL47 || VTU

Installation || Keil Software || Microcontroller Lab || 18ECL47 || VTU

Operational Amplifier || Opamp || Pre-Layout Simulation || Cadence ||17ECL77

Differential Amplifier || Post-Layout Simulation || Cadence ||17ECL77

Differential Amplifier || Pre-Layout Simulation || Cadence ||17ECL77

Common Drain Amplifier || Post-Layout Simulation || Cadence ||17ECL77

Common Drain Amplifier || Pre-Layout Simulation || Cadence ||17ECL77

Common Source Amplifier || Post-Layout Simulation || Cadence ||17ECL77

CommonSource Amplifier || PreLayout Simulation || Cadence ||17ECL77

Inverter Layout || Back Annotate || Post-Layout simulation || 17ECL77

Inverter Layout || DRC, LVS || Parasitic Extraction || 17ECL77

Inverter Layout || 45nm || Cadence tool || 17ECL77