2017 LLVM Developers’ Meeting: S. Moll “VPlan + RV: A Proposal ”
http://www.LLVM.org/devmtg/2017-10/
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VPlan + RV: A Proposal - Simon Moll and Sebastian Hack
Slides: Coming Soon
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The future of automatic vectorization in LLVM lies in Intel's VPlan proposal. The current VPlan patches provide the basic scaffolding for outer loop vectorization. However, the advanced analyses and transformations to execute VPlans are yet missing.
The Region Vectorizer (RV) is an automatic vectorization framework for LLVM. RV provides a unified interface to vectorize code regions, such as inner and outer loops, up to whole functions. RV's analysis and transformations are designed to create highly efficient SIMD code. These are the exact the analyses and transformations that are needed for VPlan.
This talk presents a proposal for integrating RV with VPlan.
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