Memory, DDR, and JEDEC - EEs Talk Tech #24
"It's a miracle it works at all." - Perry Keller
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"It's a miracle it works at all." Not the most inspiring words from someone who helped define the latest DDR spec. But, that's the the state of memory systems today. Closed eyes and mV swings are the topic of today's electrical engineering podcast. Daniel Bogdanoff and Mike Hoffman sit down with Perry Keller to talk about the state of memory today and it's inevitable march into the future.
Agenda:
00:00
Guest: Perry Keller works with standards committees and making next generation tech happen
00:50
Perry has worked with memory systems for 15 years
1:25
Perry is on the JEDEC board of directors
JEDEC is older than IEEE
1:50
JEDEC was established to create standards for semiconductors. This was when vacuum tubes were being replaced with solid state devices.
2:00
JEDEC started by working on instruction set standards. There are two keygroups. A wide bandgap semiconductors group & a memory group
3:00
Volatile memory vs. nonvolatile memory. An SSD is nonvolatile storage, like in a phone. But if you look at a DIMM in a PC that's volatile. Nonvolatile memory is all over the place.
4:00
Even a DRAM can hold its contents for quite some time. JEDEC had discussions about doing massive erases because spooks will try to recover data from it.
DRAM uses capacitors for storage, so the colder they are the longer they hold their charge.
4:45
DRAM is the last classical wide, single ended parallel bus. "It's a miracle that it works at all."
6:10
Even though DDR signals look bad, the timing and clocking is set up in a way to deal with all of the various factors.
8:35
When DDR started, 144 MT/s (megatransfers per second) was thought to be fast. DDR5 has and end goal of 6.5 GT/s on a wide single ended parallel bus.
9:05
Power is the big driver for memory technology. LPDDR - low power DDR - is also big right now.
9:30
In the memory ecosystem, the big activity is around mobile technology. The server applications are focused with the cloud, but the new technology and investment is for mobile.
10:00
DRAM can be divided into three main categories. Mainstream PC memory, low power memory, and GDDR (graphics memory).
For example, LPDDR is made up of static designs. It can clock down to DC, which normal DDR can't do.
The first DDR was basically TTL compatible. Now, we have 1.1V power supplies and voltage swings in the mV range.
Semiconductor technology is also driving the voltages down.
11:45
DRAM and GDDR is a big deal for servers.
A company from China asked JEDEC to increase the operating temperature range of DRAMs by 10 degrees C. They fire up one new coal fired power plant every week in China to meet growing power demand. They found they could cut it down to only 3 per month with this change in temperature specs.
13:09
About 5 yrs back, the industry realized increasing I/O speeds won't help performance that much because the core memory access time hasn't really changed in 15 years. The I/O rates have increased, but they get there by pulling more bits at once out of the core and shifting them out. The latency is what really hurts (at a system level).
14:14
Dev teams' entire budget for designing silicon is paid for out of smaller electric bills.
15:00
Wide bandgap semiconductors can run at very high temperatures. If that temperature ends up being deployed to data centers, you'll have to have moon suits to access the servers.
16:29
There's more interesting stuff going on in computing now than ever.
The interface between different architecture levels is not smooth. The magic in a spin-up disk is in the cache-optimizing algorithms. That whole 8-level computer architecture structure is being re-thought.
18:00
Von Neumann architectures are not limiting designers and engineers any more. Anything that happens architecturally in the computing world affects and is affected by memory.
22:00
When we move from packaged semiconductors towards 3D silicon we will see the demise of DDR. The first successful 3D silicon is called high bandwidth memory, which is basically a replacement for GDDR5.
23:00 To increment to a new DDR spec, you basically have to double the burst size.
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