Exploring CERBERUS 2100™, Episode 2: the video circuit
CERBERUS 2100™ is an educational multi-processor 8-bit computer, featuring both Z80 and 6502 CPUs, plus an AVR processor as I/O controller. Built with CPLDs, CERBERUS 2100™ is fully programmable even with respect to its hardware, at the level of individual gates and flip-flops. It runs BASIC interpreters for both CPUs, but can also be used in a 'bare metal' mode through its built-in BIOS. It can even be extended through its expansion slot, which comes paired with a powerful, generic communications protocol that allows for Direct Memory Access (DMA).
In this second episode, I cover CERBERUS's video circuit in detail, including the internal logic of its two custom chips, down to the level of individual gates and flip-flops. If you always wanted to see how a multi-color, memory-mapped VGA video encoder works, this is your chance! All design files are also freely available on the machine's Github repository (link below), so you can follow along.
Episode 3: coming soon!
Episode 1: • Exploring CERBERUS 2100™, Episode 1: intro...
Homepage: https://www.thebyteattic.com/p/cerber...
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