Microblaze Implementation in Xilinx Vivado [ In Depth Tutorial in Urdu/Hindi Language ] - Part 6
Videos in English will come soon. This video is in Urdu/Hindi Language.
In this video we will continue with Microblaze and will implement it on FPGA.
Make some design changes. Add Clock and VIO
Generate Bitstream
Run and Debug Microblaze Code.
Read and write data to block rams.
See memory contents in memory viewer
Check memory values using XTSC console
Check out the full playlist here.
• FPGA Fundamentals in Urdu/Hindi Language
Check out this playlist to to learn more about HW/SW co-design
• Zynq FPGA Tutorials ( Zynq Ultrascale+ MPS...
*******************************************************************
Timestamps:
0:00 Intro
0:35 Changes in Microblaze design ?
1:08 Vivado Block Design
2:55 Create Zynq and Microblaze application
9:14 Run Microblaze application in debug mode
13:55 Use of XTSC Console