D Flip Flop with Asynchronous reset
#digitallogicdesign #asynchronous
The D flip flop is a basic sequential element that has data input ‘d’ being driven to output ‘q’ as per clock edge. Also, the D flip-flop held the output value till the next clock cycle. Hence, it is called an edge-triggered memory element that stores a single bit. The Asynchronous reset helps to reset the circuit whenever the Reset input is turned '0'. This '0' has no care for any D or Clock, and it would just reset the output.