UART datapath and control unit design and PyAutoGUI game controller [Old Video]
Note: This video is an old video, so it no longer reflects my way of working with CPLD/FPGA. The code could have been greatly simplified (to probably less than 400 lines of code for the entire project).
For the Verilog code, Python code, timing diagram, circuit diagram, and written notes:
https://github.com/endeneer/CPLD_UART...
Timestamp:
0:00:00 Intro
0:01:16 UART receiver design
0:29:23 UART transmitter design
1:01:26 Project demo