Open Source SCR1 core - Ekaterina Berezina - ORConf 2019
SCR1 is an open-source MCU-class RISC-V core for deeply embedded applications and accelerator control, developed and maintained by Syntacore. Over the three years of its existence, the processor has found significant traction both in industry and in academia around the world.
in our brief presentation, we will talk about the SCR1 key features and the latest updates, as well as invite you to our demo, where we show the use of SCR1 both for educational purposes and for commercial projects.
Presenters: Ekaterina Berezina
Ekaterina Berezina is a Senior HW Engineer at Syntacore, where she contributes to the SCRx core family development and maintenance. Ekaterina has more than 6 years of experience in CPU IP development including architecture and microarchitecture definition, RTL design, testing and verification, area/timing/power optimization for ASIC and FPGA. She received her Master’s degree in Computer Science at Saint-Petersburg ITMO University and teaches Computer Architecture classes there.
Lightning talk recorded at ORConf 2019, the Open Source Digital Design conference, held in Bordeaux, France and organized by the FOSSi Foundation.