Cadence Virtuoso Tutorial : Designing a Common Drain Amplifier (Source Follower) | VLSI Lab #5
In this step-by-step tutorial, I walk you through the complete setup of a Common Drain Amplifier (Source Follower) in Cadence Virtuoso. Learn the essential workflow every analog designer uses: creating a schematic, building a custom symbol, and constructing a proper test circuit—all before running any simulations.
📌 *Important Note:* The simulation and analysis (AC Gain, Output Resistance, Frequency Response) will be covered in **VLSI Lab #6**. This lab ensures our design is rock-solid.
⏱️ *Chapter Guide:*
00:05- Introduction & Lab Objectives
00:30 - Step 1 - Starting a New Cell & Schematic Entry
03:00 - Placing & Connecting MOSFETs
12:20 - Step 2 - Creating a Custom Symbol (The Right Way)
16:38 - Step 3 - Building the Test Circuit
17:32 - Placing & Connecting the Symbol & Voltage Sources
25:12 - How to name wires in Virtuoso (Labelling)
➡️ *Next Up (VLSI Lab #6):* In the next video, we will use this exact testbench to perform:
• DC Operating Point Analysis
• AC Simulation for Gain & Bandwidth
• Transient Analysis
🔬 *Previous Labs:*
VLSI Lab #1: • Complete Cadence Tools Guide: Analog & Dig...
VLSI Lab #2: • Cadence Virtuoso Tutorial: CMOS Inverter D...
VLSI Lab #3: • Cadence Virtuoso Tutorial: CMOS Inverter D...
VLSI Lab #4: • Cadence Virtuoso Tutorial: CMOS Inverter -...
Here's the Complete Course Link:
• Hands-On VLSI Design: Cadence Virtuoso Lab...
📢 *For Questions & Discussion:*
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🔔 *Subscribe and hit the bell* so you don't miss **Lab #6**, where we bring this circuit to life with full simulation analysis!
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