Fast & Efficient Memory Verification and Characterization for Advanced On Chip Variation
Accurate Advanced On-Chip Variation (AVOC) needs the design to be simulated for the random and deterministic process variation. The SRAM design is complex with a lot of logics and functionalities. Creating a simulation setup for SRAM is a time consuming process and doing several Monte Carlo simulations on such a huge netlist to identify the process variation impact requires lot of simulation run time and memory. This video reviews tests performed by Invecas to evaluate traditional methods and the new Cadence Legato Memory Solution to determine the most efficient and accurate process for memory verification and characterization. For more information, visit the Legato Memory Solution page at www.cadence.com/go/legatomemory.
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Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at www.cadence.com.