Advanced Formal Verification and Robust Regression Strategies for Highly Parameterized Designs
Advanced Formal Verification and Robust Regression Strategies for Highly Parameterized Designs
This paper addresses the challenges of verifying highly parameterized designs using Formal Property Verification (FPV). With a focus on the memory control module, the paper introduces a solution leveraging Jasper FPV. The proposed FPV flow employs an Excel sheet for parameter combinations, representing all possible design variants and running parametric regression to prove each variant. Additionally, the paper will cover challenges associated with parameterized formal testbench development. This automated approach not only enhances usability but also saves time compared to manual efforts, improves overall quality, and establishes a standardized flow for future formal verification processes.
I bring over a decade of experience to the field of design verification, with 10 years dedicated to formal verification. Specializing in IP verification using Constraint Random and Formal Verification, I have worked with leading companies including LSI, Broadcom, Intel, Imagination, and currently at Marvell