Introduction to 555 Timer: Internal Block diagram and Pin configuration
In this video, How the 555 Timer works Explained, 555 timer IC is one of the most popular and widely used ICs of all time.
The timestamps of various topics covered in this video are
1:10 Pin configuration,
1:40 Internal block diagram,
2:00 Pin-8 VCC and Pin-1 GND functional details,
3:25 Pin-6 Threshold and Pin-2 Trigger functional details,
8:10 Pin-3 Output stage details,
9:42 Pin-7 Discharge function,
10:44 Pin-4 Reset function,
11:35 Pin-5 Control function,
12:45 Astable multivibrator using 555 timer,
14:13 Bistable multivibrator using 555 timer,
15:46 Monostable multivibrator using 555 timer,
The 555 timer is an extremely popular IC for timing-related applications. They can be used in many timing-related applications. It can be used to generate various types of pulses, to create time delays, and also for Pulse Width Modulation (PWM). The most common use of 555 timers is to generate clock signals for circuits
555 ICs generally come in an 8-pin DIP package. It consists of 2 comparators, a voltage divider circuit, a flip flop, a discharge transistor, and an output circuit.
The pin configuration of 8-pin DIP package (555 timer).
1. Ground
2. Trigger
3. Output
4. Reset
5. Control
6. Threshold
7. Discharge
8. VCC
The internal block diagram of 555 timer IC consists of the following stages:
1. Voltage Divider stage
2. Comparator stage
3. SR Flip-Flop stage
4. Discharge stage
5. Output Driver stage
1) Voltage divider Stage: The voltage divider is made using three 5k resistors. As the resistors are of the same value, an equal voltage gets divided between the three resistors. The voltages across these resistors are given as reference voltages to the next stage, that is comparators stage.
2) Comparator stage: It compares the voltage on its inputs and outputs a high or low voltage depending on whether the voltage on the inverting or non-inverting input is higher.
3) SR flip-flop stage: A SR filp-flop depending on the two inputs S (SET) and R (RESET) gives the Outputs Q and QBAR, where Q and QBAR are the complements of each other.
4) Discharge stage: This discharge process stops the timing, It is used to provide a discharge path for the timing capacitor to the ground when the output is low..
5) Output stage: It is an inverting circuit, which raises the current levels to drive loads up to 200mA. This allows us to connect loads directly to the output pin of the IC.
Operating modes of the 555 Timers
There are three operating modes of the 555 timers:
1) Monostable, 2) Bistable and 3) Astable.
Various combinations of capacitors and resistors are connected to the input pins of the 555 timers to switch between these modes. This allows us to create different applications with the 555 timers, just by rearranging the externally connected components.
This video will be helpful to the students of science and engineering in understanding the basic working of 555 timer IC.
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