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Antenna effect in VLSI Fabrication | Plasma Induced Gate Oxide Damage | Plasma Etching

Опубликовано: 26 Июль 2026
на канале: Team VLSI
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Antenna effect in VLSI Fabrication has been explained in this video session. Antenna effect is also known as Plasma Induced Gate Oxide damage, so this effect is due to plasma etching of metals connected to gate. During plasma etching, a large amount of charge has been developed on polysilicon which causes gate oxide damage. Plasma etching process and metal fabrication steps have also been explained briefly.
How to protect the antenna effect, what is the antenna rule and how antenna checks are performed in Physical design will be explained in the next session.

In this series of video sessions, We will cover various effects which should take care of during physical design.

If you feel this video is relevant to your domain and useful, please like the video and subscribe to this channel.
Your queries/suggestions are most welcome in the comment section.

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VIDEOS IN THIS SERIES
1. Latchup issue:
   • Latch-up  in CMOS Technology | Latch-up Fo...  
2. Latchup prevention techniques
   • Latch-up prevention in CMOS | Various tech...  
3. Antenna effect:
   • Antenna effect in VLSI Fabrication | Plasm...  
4. Antenna prevention techniques
   • Antenna Effect Prevention Techniques in VL...  
5. Electromigration issue in ASIC
   • Electromigration in VLSI Design | What is ...  
6. IR Drop Issue in VLSI
   • IR Drop issue in VLSI | What is IR drop in...  
7. On-Chip variations
   • On-Chip Variation in VLSI | OCV | Why OCV ...  
8. Crosstalk effect in VLSI
   • Crosstalk issue in VLSI | Signal Integrity...  
9. Crosstalk prevention
   • Crosstalk issue and  prevention techniques...  
------------------------------------------------------------------------------
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#AntennaEffect #AntennaIssue #AntennaEffectInVLSI

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